| Conference |
| Type of Publication |
| The Impact of Resync on Wireless Sensor Network
Performance |
| Title |
|
|
| Authors |
| Proc. of Performance Control in Wireless Sensor
Networks (PWSN'06), Coimbra, Portugal, May 2006 |
| Published in |
| Many of todays sensor nodes exhibit special
transmission errors. These errors are due to some common hardware
components being used, particularly the so-called UART (serial
communication) circuits that interconnects radio transceivers and
the CPUs. UARTs generate start-, data- and stop-bits. As long as
the state machine at the sender and the receiver is synchronized,
even single bit errors can often be corrected by Forward Error
Correction (FEC). However, once one or several bits are missed,
the state machine at the receiver side will get out of sync so
that data bits are misinterpreted as start- or stop-bits and vice
versa, rendering the entire remaining communication useless. In
this paper, we will devise a periodic resync scheme that enables
the receiver to catch up on a data stream even in case of skipped
bits. In noisy environments as well as for weak senders, we can
improve the overall data throughput significantly. |
| Abstract |
|
Resync
UART
Wireless Sensor Networks
|
| Keywords |
| [PDF]
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| Downloads & Bib-Entries |
